Integrated semiconductor devices are typically constructed en masse on a wafer of silicon or gallium arsenide. Each device generally takes the form of an integrated circuit (IC) die, which is attached to a lead frame with gold wires. As shown in FIG. 1, the die and lead frame are then encapsulated in a plastic or ceramic package, which is then recognizable as an IC "chip". IC chips come in a variety of forms such as dynamic random access memory (DRAM) chips, static random access memory (SRAM) chips, read only memory (ROM) chips, gate arrays, and so forth. The chips are interconnected in myriad combinations on printed circuit boards by a number of techniques, such as socketing and soldering.
Interconnections among chips arrayed on printed circuit boards are typically made by conductive traces formed by photolithography and etching processes. Semiconductor circuit devices, including DRAMs, SRAMs and gate arrays are essentially switching devices. As the output drivers within those chips create intermittent current flow on associated conductive traces, the traces behave as inductors, creating voltage surges which have the potential for creating logic errors. Other logic-damaging transient voltages, caused by voltage fluctuations at the power line and the interaction of other circuit components in the system, may also be present.
In order to render innocuous the transient voltages which regularly appear in logic circuits, decoupling capacitors are commonly used as low-frequency bypass filters.
The gold connection wires, because of their length relative to their diameter, function as inductors. As current through the gold connection wires is alternately switched on and off, voltage spikes occur. In order to reduce the effects of voltage transients, external capacitors have been installed either within the semiconductor package or on a circuit board onto which the semiconductor packages are installed. In either case, the capacitor is on an opposite side of the lead frame connection wire from the semiconductor die. This establishes the circuit shown in FIG. 2. This equivalent circuit represents an inappropriate arrangement for filtering voltage transients which would affect the circuit die, represented in FIG. 2 as box 11.
One circuit-board-mounted semiconductor chip array that is of particular interest is the SIMM (single in-line memory module). SIMM boards are typically constructed with such capacitors, which are usually located beneath or adjacent memory array circuit chips on the SIMM.
SIMM (single in-line memory module) boards are circuit arrays which consist of byte multiples of memory chips arranged on a printed circuit board or comparable mounting arrangement. The SIMM board is connected to a circuit control board by an edge connector.
The SIMM is a highly space-efficient memory board having no onboard address circuitry and which is designed to plug directly into the address, data and power-supply busses of a computer so that the randomly-addressable memory cells of the SIMM can be addressed directly by the computer's CPU rather than by a bank-switching technique commonly used in larger memory expansion boards. Memory cells on the SIMM are perceived by the computer's CPU as being no different than memory cells found on the computer's mother board. Since SIMMs are typically populated with byte multiples of DRAMs, for any eight bit byte or sixteen bit byte or word of information stored within a SIMM, each of the component bits will be found on a separate chip and will be individually addressable by column and row. One edge of a SIMM module is a card-edge connector, which plugs into a socket on the computer which is directly connected to the computer busses required for powering and addressing the memory on the SIMM.
The control board may be any of a number of circuits which address memory arrays. Examples include computer mother boards, daughter boards which plug into a mother board, wherein the daughter board functions as a mother board for the SIMM module, peripheral devices with a capability of using add-on memory, and special purpose equipment which uses memory. It is also possible to use small modules of arrays of similar circuits for purposes other than memory applications.
The capacitor on the SIMM mounted external to the memory chips establishes the inappropriate arrangement for filtering voltage transients. Therefore, it is desirable to provide capacitance on the other side of the inductor, i.e., the side of the inductor that the device is connected to.
Present SIMM boards are provided with surface-mounted decoupling capacitors, which cannot be seen in plan view. In the usual case, one decoupling capacitor is mounted beneath each DRAM chip, with connections between buss voltage (V.sub.CC) input and the connection to ground. The V.sub.CC buss and the ground-plane buss on circuit die 11 are not visible in a plan view, since those particular buss traces are located between two of the board's six layers.
In most cases, each of the module's decoupling capacitors are connected in parallel between the V.sub.CC buss and the ground plane buss. As long as the dielectric of each of the eight capacitors is intact, the module is functional. However, a short in any one of the eight capacitors will result in the V.sub.CC buss becoming shorted to the ground-plane buss, whereupon the module will begin to draw an inordinate amount of current which will invariably result in its destruction.
Decoupling capacitors of the surface-mount type are particularly susceptible to shorting, since they have no leads to thermally isolate them as they are soldered to a circuit board with infrared energy, at temperatures of up to approximately 370.degree. C. (700.degree. F.). Even if a surface-mount capacitor survives the mechanical shock generated by the soldering process, the capacitor is still vulnerable to other types of mechanical stress. For example, by simply bending a SIMM having surface-mounted capacitors, the capacitors may be compromised. And, even if a SIMM passes testing (an indication that the decoupling capacitors are at least not shorted), it may have a relatively high failure rate when placed in use. SIMMs of the type shown in FIG. 9 have an average failure rate traceable to shorted decoupling capacitors during the first 90 days of use of roughly 3-10 per 100,000, which is a failure rate that is considered unacceptable.
Single inline packages (SIPs) are similar in design to SIMMs, except that instead of having a card edge-type connector, SIPs have which are either socketed or soldered for connection to on a buss. The problems associated with the decoupling capacitor system of SIMMs also apply to SIPs.
Most semiconductors, including all DRAMS, include capacitors. For example, a 4 Megabit DRAM includes over 4 million capacitors each. For the purpose of storing individual bits of information, these capacitors are accessed by connections through access transistors and sense amplifiers, connected through a peripheral circuit. The present invention concerns adding filter capacitance to such devices in order to provide protection from voltage transients which may not be afforded by what may be millions of other capacitors on the semiconductor device.
Semiconductor circuit devices are designed with an architecture which places their functional circuitry within a confined area, usually rectangularly shaped. At the perimeter (either outside or inside) of the rectangularly shaped area are a series of contact pads and a substantial amount of chip area which is occupied by conductor busses, but is unoccupied by active circuit devices. Unlike many of the circuit elements on a semiconductor circuit device, filter capacitors need not be built to precise specifications. It is therefore, possible to utilize perimeter areas and portions of semiconductor chip area which form major border areas between active portions of the semiconductor circuit device.
There is a significant advantage to any added circuit elements being on the same side of a chip wafer as other circuit elements, because of manufacturing techniques and tolerances. Conventionally, semiconductor circuit devices are arrayed on one side of a die wafer. It would therefore be advantageous to design a filtering element which would not significantly expand the die area (chip area) required for each die.
There is a certain portion of the die area which is not particularly suitable for active circuitry. This includes chip area occupied by bus lines, which are normally metallization which overlays most or all of the patterned layers which make up the active circuitry on the die.